The present invention relates generally to data communications, and more particularly, to a system and method for achieving reduced timing wander in a digital subscriber line (DSL) communication system.
In the field of data communications a transceiver, or modem, is used to convey information from one location to another. Digital subscriber line (DSL) technology now enables DSL transceivers to more rapidly communicate data than previously possible with purely analog modems. DSL transceivers communicate by modulating a baseband signal carrying encoded digital data, converting the modulated digital data signal to an analog signal, and transmitting the analog signal over a conventional copper wire pair using techniques that are known in the art. These known techniques include mapping the information to be transmitted into a multi-dimensional multi-level signal space constellation and slicing the received constellation to recover the transmitted information.
The constellation can include both analog and digital information or only digital information.
In the above mentioned communications environment, a central office DSL transceiver is located at a telephone company central office location. Connected to the DSL transceiver via a conventional copper wire pair is a suitably configured remote DSL transceiver. The remote transceiver resides at a location commonly referred to as a customer premise. Before the central office transceiver can exchange information with the remote transceiver, clock timing and synchronization between the central office transceiver and a network master clock should be established.
Timing and synchronization are fundamental to any digital transmission and switching network. In a digital transmission system, timing is encoded with the transmitted signal using a network master clock, such as a T1 or E1 clock as a reference clock. As such, the central office transceiver must recover system timing and synchronization from this system clock. Once frequency synchronization between the central office transceiver and the network clock is achieved, the central office transceiver can identify frame boundaries of downstream data signals designated for further transmission to the remote transceiver. In addition, the central office transceiver can identify frame boundaries of upstream data signals received from the remote transceiver that may be designated for further transmission to other network connected devices.
In the aforementioned communications environment, synchronization is provided in a master-slave relationship such that the network timing (e.g., a T1 clock) is the master allowing it to provide timing information to all the slave data transmission systems connected to the network. Each remote transceiver connected to the network must be synchronized to the network system clock as provided by the central office transceiver.
In order to achieve higher data rates with a fixed distance or with a given non-rate adaptive DSL transceiver technology, two or more DSL lines may be combined. By way of example, high-speed DSL (HDSL) technology uses two pairs of twisted copper wire, HDSL transceivers, multiplexers and demultiplexers at each end of a communication link to provide T1 capacity service over two pairs of twisted copper conductors commonly used in local subscriber loops within the PSTN. The European version of HDSL binds three pairs of twisted copper conductors and their related transceivers, multiplexers, and demultiplexers to provide E1 capacity service.
The prior art HDSL link illustrated in FIG. 1 is offered by way of example to highlight various interface equipment that may be used to provide a T1 capacity link between a PSTN central office (CO) and a customer premise (CP). In this regard, FIG. 1 illustrates a basic HDSL network link architecture. As illustrated in FIG. 1, a HDSL network link 10 may comprise equipment located within a CO 20, equipment located within a CP 40, and HDSL interface equipment 30 as required within each location to transfer data to and from an ATM switch (not shown). More specifically, the central office 20 may comprise a plurality of trunk line interfaces 21, 23, and 25, herein labeled analog trunk card, digital trunk card, and optical trunk card, respectively; a PSTN digital switch 22; and a plurality of HDSL termination unitsxe2x80x94central office (HTU-C) 24a, 24b, 24c, . . ., and 24x. As illustrated in FIG. 1, each HTU-C 24a, 24b, 24c, . . . , and 24x may be coupled via two twisted pair telephone transmission lines 31a, 31b to a dedicated HDSL termination unitxe2x80x94remote (HTU-R) 44 (one shown for simplicity of illustration).
As also illustrated in FIG. 1, the combination of the HTU-C 24c, the two twisted pair telephone transmission lines 31a, 31b, and the HTU-R 44 may comprise the HDSL interface equipment 30. As further illustrated in FIG. 1, the CP 40 may comprise a customer interface 46 and customer premise equipment 48 which may contain one or more computing devices (not shown).
It is significant to note that downstream and upstream data transmissions that are transmitted across the HDSL network link 10 of FIG. 1 must be processed at the HTU-Rs 44 and the HTU-Cs 24 in order to ensure that data transmissions are inverse multiplexed and reconstructed into their original configuration. Each of the HTU-Rs 44 and the HTU-Cs 24 may further comprise a transceiver and a mapper (both not shown). At one end of the HDSL communications network 10, a first mapper may be used to inverse multiplex or distribute a data transmission across multiple transmit media (i.e., the twisted pair telephone transmission lines 31a, 31b). At the opposite or receiving end of the HDSL communications network 10, a second mapper may be used to multiplex or reconstruct the original data transmission. By way of example, a downstream data transmission may be inverse multiplexed such that a portion of the data is transmitted via the HTU-C 24c across a first twisted pair telephone transmission line 31a with the remaining portion of the data transmission sent via a second twisted pair telephone transmission line 31b. After the first and second portions of the data transmission are received and reconstructed by the HTU-R 44, the first and second portions of the original data stream may be multiplexed before being forwarded to the customer interface 46 and the CPE 48. Often the customer interface 46 is implemented with a router having a port coupled with one or more HTU-Rs 44 and or other network interface devices.
A common technique for achieving timing synchronization between the network clock and the central office transceiver is based upon the use of an external framer, which performs a bit-stuffing operation. In this arrangement the aggregate bit stream has a higher data rate than the input data rate from the network. This data rate relationship accommodates the additional stuffing and framing bits. Bits are stuffed (inserted) or deleted (removed) from the incoming data stream until a clock rate derived from the incoming data stream is equal to that of the input data rate from the network. This bit stuffing operation permits the transceiver to derive a local clock with a frequency that tracks the frequency of the network clock.
Presently, the add/delete or bit-stuffing mechanism synchronizes a customer interface and a transmit carrier by determining the relative position of a DSL frame reference point to a periodic customer reference point and responding accordingly. When the DSL frame reference point leads the customer reference point, a timing field in the frame is set to 4 bits. Otherwise, the timing field is set to 0 bits. The present bit-stuffing mechanism generates a significant wander in the DSL frame with respect to the customer reference point. The wander is not removable. Accordingly, it is desired to provide a system and method that efficiently and accurately reduces timing reference wander in a DSL based communications system.
In light of the foregoing, the present invention uses a sliding window algorithm that may be implemented on a digital signal processor (DSP) to reduce timing reference wander in a DSL communication system. The system and method of the present invention provide for the synchronization of one or more derived clocks to a network system clock without extensive modification or additional external circuit components.
The system may be implemented in hardware or with a combination of firmware and software that uses a state table to apply designated stuff/delete bits for each of a plurality of sliding windows. The sliding windows may be controlled by monitoring the relative position of the DSL frame to the network system clock and selecting the active window in response to the relative position over a number of DSL frames. The configuration ensures that after initial acquisition, the locally generated clock and all clock signals derived from the local clock signal dynamically track any frequency and phase variation of the external reference clock.
In a preferred embodiment, a network timing reference clock may be configured to drive a counter, which may be used to trigger a first latch upon receiving X clock signal transitions. The first latch may be reset after an appropriate delay. Concurrently, a selected reference point within a DSL frame being processed in a DSL transceiver may be used to trigger a second latch. A comparator may determine from the condition of the first latch at the point the second latch is triggered whether the DSL frame is leading or lagging the network timing reference point. A result from the comparator may be used in conjunction with a sliding window identifier to select an appropriate set of delete or stuffing bits from a sliding window state table. Furthermore, a DSL frame state recorder may be configured to monitor the relative position of the DSL frame reference point with regard to the network timing reference clock over a variable number of frames and responsively select an adjacent sliding window if the DSL frame reference point leads or lags the network timing reference point for M consecutive frames.
A network timing reference unit in accordance with the present invention may comprise a counter, a network timing latch, a synchronization word detector, a DSL frame latch, a lead/lag comparator, a sliding window buffer, a sliding window state table, a DSL frame state recorder, and a sensitivity buffer. The present invention provides a method for reducing transmit carrier wander in a DSL transceiver. In its broadest terms, the method can be described as: receiving a network clock and a DSL data stream comprising a plurality of frames; identifying a reference point on the network clock signal; identifying a DSL frame reference point; recording the relative position of the DSL frame reference point to the network clock reference point; performing a bit-manipulation responsive to the relative reference positions and a current window position; and adjusting the current window position in response to a consistent relative reference position over time.
Other features and advantages of the present invention will become apparent to one skilled in the art upon examination of the following drawings and detailed description. It is intended that all such additional features and advantages be included herein within the scope of the present invention, as defined in the appended claims.